1. Field of the Invention
This invention relates to a method of manufacturing a display panel.
The present application claims priority from Japanese Applications No. 2004-149521 and 2004-7085, 2003-356387, the disclosure of which is incorporated herein by reference.
2. Description of the Related Art
FIG. 1 is a vertical sectional view showing the panel structure of a reflection-type PDP (Plasma Display Panel) driven by alternating current, as an example of display panels.
The PDP includes a front substrate 1. On the inner surface of the front substrate 1 are formed row electrode pairs (X, Y) each constituted of a row electrode X and a row electrode Y paired with each other, a dielectric layer 2 covering the row electrode pairs (X, Y) and a protective layer 3 made of MgO or the like and covering the dielectric layer 2. The row electrodes X and Y of each row electrode pair (X, Y) includes transparent electrodes Xa and Ya which are made of ITO or the like, and bus electrodes Xb and Yb which are formed of thick-film electrodes made of silver or the like.
The front substrate 1 is opposite to a back substrate 4. On the inner surface of the back substrate 4 facing toward the front substrate 1, column electrodes D extend in a direction at right angles to the row electrode pairs (X, Y) and form discharge cells C within a discharge space S in positions corresponding to intersections with the row electrode pairs (X, Y). On this inner surface, further, a column-electrode protective layer 5 is formed and covers the column electrodes D. Then, phosphor layers 6 colored red, green and blue for the individual discharge cells C are formed on the column-electrode protective layer 5. Then, a partition wall construct (not shown) is formed for partitioning the discharge space S into the discharge cells C.
The discharge space S is formed between the front substrate 1 and the back substrate 4, and sealed at the peripheral end by a sealing layer 7. The discharge space S is filled as discharge gas with a mixture of 5 to 10 percent xenon Xe and neon Ne.
The phosphor layer 6 emits light by being excited by vacuum ultraviolet light (wavelength 147 nm) that is emitted from the xenon by discharge.
FIG. 2 is a flow graph illustrating the process in a conventional method of manufacturing the PDP structured as described above. FIG. 3 is a graph showing the relationship between a change in temperature in a baking furnace and time elapsing in the process in the conventional manufacturing method.
Next, the conventional manufacturing method is described with reference to FIGS. 2 and 3.
First, in step s1 for producing a front substrate in FIG. 2, the row electrodes X and Y are formed on the front substrate 1 by photolithography or the like. Then, the dielectric layer 2 is formed by screen printing techniques or the like. Then, MgO is deposited to form the protective layer 3.
On the other hand, in step s2 producing a back substrate, the column electrodes D are formed on the back substrate 4 by photolithography or the like. Then, the column-electrode protective layer 5 is formed by screen printing techniques or the like. Then, the partition wall construct is formed by sandblasting techniques or the like. After that, a phosphor paste is applied between partition walls of the partition wall construct and baked to form the phosphor layers 6.
Next, the peripheral portion of the inner surface of the back substrate 4 thus structured which will be placed opposite the front substrate 1 is coated with glass frit for sealing. Then, the back substrate 4 is temporarily burned at about 400 degree C. to form the sealing layer 7 (step s3).
Next, the front substrate 1 and the back substrate 4 with the sealing layer thus formed are placed opposite each other such that the row electrodes X and Y formed on the front substrate 1 are positioned at right angles to the column electrodes D formed on the back substrate 4 (step s4). While remaining in this position, the front substrate 1 and the back substrate 4 are placed in the baking furnace (step s5).
After that, as shown in FIG. 3, the temperature in the baking furnace is increased. When the temperature reaches a sealing temperature t1 (about 450 degree C.), the sealing temperature t1 is retained for a predetermined sealing-process period p1. During the sealing-process period p1, the sealing layer 7 formed on the back substrate 4 is fused to the front substrate 1 by the heating. As a result, the peripheral portion of the discharge space S created between the back substrate 4 and the front substrate 1 is sealed (step s6).
After the expiration of the sealing-process period p1, the temperature in the baking furnace is lowered to a predetermined temperature t2 (about 400 degree C.) lower than the sealing temperature t1, during which time the glass frit in the sealing layer 7 solidifies. Thereupon, the temperature t2 is retained for a predetermined evacuating-and-baking-process period p2.
Then in the evacuating-and-baking-process period p2, while the front substrate 1 and back substrate 4 are heated (baked) at the temperature t2, the discharge space S is evacuated so that a vacuum is produced in the discharge space S (step s7).
After the expiration of the evacuating-and-baking-process period p2, the temperature in the baking furnace is decreased to about room temperature. In this condition, the discharge gas is introduced into the discharge space Sat a predetermined pressure (400 to 600 Torr) (step s8). After completing the introduction of the discharge gas, an evacuation pipe, which has been used for gas-evacuating and introducing the discharge gas, is sealed with a burner or the like (step s9).
Then, drive pulses are applied between the paired row electrodes X and Y on the front substrate 1 to cause discharge for a predetermine time period. Due to this discharge, the protective layer 3 on the front substrate 1 is activated and discharge stabilization (i.e. aging) is performed (step s10).
Such a conventional method of manufacturing the display panel is disclosed in Japanese unexamined patent publication No. 2000-30618, for example.
In the conventional method of manufacturing the display panel as described above, during the sealing-process period p1 in the sealing step s6 in which the discharge space S is sealed by the sealing layer 7, atmosphere and an impure gas produced from the substrates by heating fill the space between the front substrate 1 and the back substrate 4. Therefore, the inner surfaces of the front and back substrates are exposed to the impure gas of H2O, CO2 and the like under high temperature conditions.
This is a significantly undesirable situation for the display panel under the manufacture process. A problem arising is the impairment of a process of degassing from MgO deposited for forming the protective layer 3 on the front substrate 1. Another problem arising is the deterioration of the phosphor materials forming the phosphor layer 6 on the back substrate 4.
There are some thinkable techniques that can be used to avoid producing such problems. In one technique, ample time for evacuating gases from the discharge space S in the evacuating-and-baking-process period p2 is provided in order to perform sufficient degassing from the protective layer (MgO) 3, thus allowing recovery of the deteriorating phosphor layer 6. Another one is vacuum sealing in which the discharge space S is sealed in vacuum environments.
However, providing for such a long time in the evacuating-and-baking-process period p2 to allow for sufficient gas-evacuation causes a considerable increase in the manufacturing time. Further, the vacuum sealing technique requires a large-scale apparatus. Accordingly, both the techniques become big factors that increase manufacturing costs.